In total I got more chips from him and sometimes it was just spot-on (like after the first driving, wow I like it), sometimes it was a bit off from how I wanted and I used piggybacks on that (Anyways the car always had a MAFT and a Safc and ITC). But please keep in mind that where I live has no access to dyno, so couldn't tell how much exactly different. I was using Apexi RSM w/ a G-sensor on the streets or a local 1/4 mile track to check the difference, and how I feel the difference while driving. He didn't charge for re-programing until I get satisfied if I pay the shipping. But I live in North America and he was in Japan, so considering the international shipping, I chose to use piggyback to adjust some.Just more curiosity, did they get them pretty spot on or did you back them up with a piggy back? (I’m just reliving the glory days at this point don’t mind me )
This is awesome. Wish I had a rundown like it when I was starting out.Lets start with the the disassembly (as it existed when released) and then look at the ROM image, and maybe we can relate that to Tunerpro's XDF file.
The E931 software, once you see how the parts relate you can start looking at other versions and make comparisons.
The key file for now is the standard_E931.lst which is the listing output from the assembler. There are a lot of comments to look through but a couple of key things to know.
The code in the ROM images wind up at the high end of the ECU's 64k memory map. At the low end is some internal registers that control how the microprocessor is configured and functions. The there is some RAM memory on chip used for variables and storage.
So the 4 16k blocks are (in hexidecimal):
8000-BFFF Empty space in most Images
C000-FFFF Where the EPROM image resides
Erased bits of a 27XX series EPROM are all 1's (so bytes are 0xFF) and programming them changes the 1 bit to 0's where needed.
6800 family processors have an interrupt jump table in high memory and on reset read the last two bytes of memory as the address to start executing code. If you look at the listing you'll see CEFF as that address and if you then look at that address you'll see an instruction to jump to the reset routine at D03E. If you look at the code there you'll see some initialization and then a loop of the four subroutines that make up the main part of the ECU processing.
It runs these loops in order until an external interrupt causes it to handle the interrupt and then continues where it left off. If you look at the table at the end of memory again you'll see what some of the interrups are and the the start of their handlers.
I'll pause here and let Jane and others comment before I continue.
This is awesome. Wish I had a rundown like it when I was starting out.
Understand. That's what I thoughta bit hard for me to translate
Actually there is Link Japan. Recently you find Australian/New Zealand companies often in Japan since they are closer, and they seem to know how to live in Japan which mean they have their customer service/support in Japanese. Because most of Japanese people hesitate to speak English (or don't speak), they are shy hahah. And for a long period of time, everything could be completed within the country, so Japanese people are totally not used to buy something from outside of country. Many people in Japan are interested in the foreign products now, since there are not many options with Japanese companies anymore.On a side note I see they are also a LinkECU dealer which has nothing to do with what we’re speaking of but always found it nice they seem to have a presence in Japan.
Correct. Recently you can buy it but totally not common.E85 isn’t available or widely available in Japan.
First, be kind to yourself!I’m probably entirely wrong as I think I may have hit a brick wall here, but I’m under the impression the 0xFFs are populating to make up the difference between a 32x file and 64x file, essentially filling in the gap in a way? I’m wrong and all of you that understand this stuff are laughing now, right?
Two concepts may help put it all together.
One is mapping. The CPU has a 64k "field" it can address. It "maps" components to different areas of this field. 0x0000 to 0x003F are mapped to data registers. 0x0040-0x0056 is internal battery backed RAM, 0x0057-0x01BF is internal RAM.
Here's the fun part, the external EPROM is 32k, mapped to the top of the 64k field. So 0x8000-0xFFFF. If we want the addresses the code uses to line up, we have to act like there is all the other stuff before it still.
It gets a little more complicated...
The second concept is external ROM vs internal ROM. The binaries we are used to seeing are external (32k) however the internal ROM is smaller, and maps from 0xD000-0xFFFF.